summaryrefslogtreecommitdiff
path: root/hw/bbcpu.sch
diff options
context:
space:
mode:
authorWerner Almesberger <werner@almesberger.net>2016-11-14 15:28:45 -0300
committerGenerated from internal repo <nobody@neo900.org>2016-11-14 15:28:45 -0300
commit36839c32096a5b43e7368fb6679beb1ff049dcd6 (patch)
treefaffdfe89dcae782ba48ed6b05efdee52c8dc729 /hw/bbcpu.sch
parent5da7e137d10db1c4a61abbffde22792481cc03b3 (diff)
downloadee-36839c32096a5b43e7368fb6679beb1ff049dcd6.tar.gz
ee-36839c32096a5b43e7368fb6679beb1ff049dcd6.tar.bz2
ee-36839c32096a5b43e7368fb6679beb1ff049dcd6.zip
bbcpu.sch: assign bidirectional signals to tri-state-capable Silego pins
Tri-state-capable means that there is an OE signal that can be changed by the logic (and not just by configuration).
Diffstat (limited to 'hw/bbcpu.sch')
-rw-r--r--hw/bbcpu.sch24
1 files changed, 12 insertions, 12 deletions
diff --git a/hw/bbcpu.sch b/hw/bbcpu.sch
index d280d2b..05461af 100644
--- a/hw/bbcpu.sch
+++ b/hw/bbcpu.sch
@@ -45,7 +45,7 @@ EELAYER 25 0
EELAYER END
$Descr A3 16535 11693
encoding utf-8
-Sheet 34 25
+Sheet 23 25
Title "BB-xM Adapter (CPU)"
Date "Intentionally Left Blank"
Rev ""
@@ -256,16 +256,10 @@ Wire Wire Line
Wire Wire Line
10000 4150 12100 4150
Wire Wire Line
- 10100 3850 10100 4050
-Wire Wire Line
- 10100 4050 12100 4050
-Wire Wire Line
- 10200 3650 10200 3950
-Wire Wire Line
- 10200 3950 12100 3950
-Text Label 10300 3950 0 60 ~ 0
-PCM_MUX_DR
+ 10200 3650 10200 4050
Text Label 10300 4050 0 60 ~ 0
+PCM_MUX_DR
+Text Label 10300 3950 0 60 ~ 0
PCM_MUX_FSYNC
Text Label 10300 4150 0 60 ~ 0
PCM_MUX_CLK
@@ -323,13 +317,13 @@ Wire Wire Line
12800 3350 12800 2750
Text GLabel 14250 4050 2 60 Input ~ 0
MCBSP4_DR_U
-Text GLabel 14250 4150 2 60 Output ~ 0
+Text GLabel 14250 4250 2 60 Output ~ 0
MCBSP4_DX_U
Wire Wire Line
13500 4050 14250 4050
Wire Wire Line
14250 4150 13500 4150
-Text GLabel 14250 4250 2 60 BiDi ~ 0
+Text GLabel 14250 4150 2 60 BiDi ~ 0
MCBSP4_CLKX_U
$Comp
L GND #M2309
@@ -797,4 +791,10 @@ Wire Wire Line
6700 8650 6900 8650
Text GLabel 8900 8250 2 60 Input ~ 0
HEADPH_IND_U
+Wire Wire Line
+ 10200 4050 12100 4050
+Wire Wire Line
+ 10100 3850 10100 3950
+Wire Wire Line
+ 10100 3950 12100 3950
$EndSCHEMATC