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authorWerner Almesberger <werner@almesberger.net>2016-06-30 13:24:04 -0300
committerWerner Almesberger <werner@almesberger.net>2016-06-30 13:24:04 -0300
commit0899d39abd262c847a0c6be90361c8de3dadc77a (patch)
tree9af0ff1a6aeb297cc1a679d4a7dd91114626ffbd /ir
parent26a67c2ed863b3fd6e7f1fd92510f1ab02d7b073 (diff)
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ir/: simplify receiver circuit by using mixed-signal array
Diffstat (limited to 'ir')
-rw-r--r--ir/ir.tex17
-rw-r--r--ir/rx.fig41
2 files changed, 24 insertions, 34 deletions
diff --git a/ir/ir.tex b/ir/ir.tex
index 030430c..cc99ba4 100644
--- a/ir/ir.tex
+++ b/ir/ir.tex
@@ -644,6 +644,7 @@ IR subsystem must be pulled to a safe state.
% -----------------------------------------------------------------------------
\section{Configuration logic}
+\label{cfglogic}
The configuration logic selects either TX, CTS, or `off' depending on the mode
of operation (section \ref{cfg}). The polarity of the TX signal depends
@@ -762,32 +763,28 @@ The following diagram shows the IR receiver circuit:
\includegraphics[scale=0.89]{rx.pdf}
\end{center}
-When the receiver is enabled (analog switch U2 is closed), D1 is
-reverse-biased through R6.
+D1 is reverse-biased through R6.
R6 pulls the signal at {\bf B} close to ground when the diode is not
illuminated, and lets the voltage raise when D1 is illuminated and
the reverse current through it increases.
The high-pass filter is implemented by comparing the signal from the
-sensor ({\bf B} and {\bf C}) with the same signal after passing the
+sensor ({\bf B}) with the same signal after passing the
low-pass filter formed by R5 and C1 ({\bf A}).
When the diode is not illuminated, R5 also ensures that the voltage
-at {\bf A} is higher than at {\bf C}, thus adding a threshold for
+at {\bf A} is higher than at {\bf B}, thus adding a threshold for
signal detection.
The comparator U1 operates as inverting Schmitt-trigger, with
R1 and R2 determining the hysteresis.
-When the receiver is disabled (analog switch U2 is open) and the
-sensor is not illuminated,
-the voltage divider formed by R3 and R4 (with some contribution
-from R1) lets C1 charge to the expected operating point.
-R6 pulls {\bf C} to ground in this case.
-
R7 ensures that CPU and Hackerbus can override the IR receiver,
especially when disabled or not illuminated.
+The analog comparator is part of the mixed-signal array.
+(See section \ref{cfglogic}.)
+
% -----------------------------------------------------------------------------
\clearpage
diff --git a/ir/rx.fig b/ir/rx.fig
index c7dc76f..9d93b08 100644
--- a/ir/rx.fig
+++ b/ir/rx.fig
@@ -7,6 +7,16 @@ A4
Single
-2
1200 2
+6 4410 6570 4995 7470
+2 2 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
+ 4500 6615 4680 6615 4680 7020 4500 7020 4500 6615
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4590 7020 4590 7425
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4455 7425 4725 7425
+4 0 0 50 -1 22 12 0.0000 4 135 210 4725 6795 R6\001
+4 0 0 50 -1 22 12 0.0000 4 135 270 4725 7020 22k\001
+-6
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
7245 4635 5175 4635
2 3 0 3 0 7 50 -1 -1 0.000 1 0 -1 0 0 4
@@ -23,12 +33,8 @@ Single
8505 4545 8505 4725
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
8415 5445 8595 5445
-2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
- 7875 6300 7875 6615
-2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 4
- 8325 5445 7875 5445 7875 6300 6570 6300
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 4
- 4590 4500 4590 6300 6300 6300 6525 6210
+ 8325 5445 7875 5445 7875 6300 4590 6300
2 2 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
7245 4545 7650 4545 7650 4725 7245 4725 7245 4545
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
@@ -48,17 +54,6 @@ Single
2 1 0 3 0 7 50 -1 -1 0.000 0 0 7 1 0 2
1 1 3.00 45.00 45.00
10530 5040 11025 5040
-2 2 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
- 7785 6615 7965 6615 7965 7020 7785 7020 7785 6615
-2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
- 7875 7020 7875 7425
-2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
- 7740 7425 8010 7425
-2 2 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
- 6210 6075 6660 6075 6660 6525 6210 6525 6210 6075
-2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 3
- 8 1 3.00 60.00 60.00
- 6435 6525 6435 6975 5625 6975
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
5895 5580 5895 6300
2 2 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
@@ -94,7 +89,10 @@ Single
4590 5400 4140 5400
2 2 0 3 0 7 50 -1 -1 0.000 0 0 7 0 0 5
10125 4950 10530 4950 10530 5130 10125 5130 10125 4950
-4 0 0 50 -1 22 12 0.0000 4 135 705 8415 5130 NCX2200\001
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4590 4500 4590 6615
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 8865 6075 8865 5445
4 0 0 50 -1 22 12 0.0000 4 135 210 8955 4635 U1\001
4 1 0 50 -1 22 12 0.0000 4 135 120 6300 4590 A\001
4 0 0 50 -1 22 12 0.0000 4 135 270 7245 4500 33k\001
@@ -107,12 +105,6 @@ Single
4 0 0 50 -1 22 12 0.0000 4 135 270 10125 4905 10k\001
4 0 0 50 -1 22 12 0.0000 4 135 210 10125 4725 R7\001
4 0 0 50 -1 22 12 0.0000 4 135 225 11070 5085 RX\001
-4 1 0 50 -1 22 12 0.0000 4 135 120 7875 5400 C\001
-4 0 0 50 -1 22 12 0.0000 4 135 210 8010 6795 R6\001
-4 0 0 50 -1 22 12 0.0000 4 135 270 8010 7020 22k\001
-4 0 0 50 -1 22 12 0.0000 4 135 810 6525 6750 NX3V1G66\001
-4 1 0 50 -1 22 12 0.0000 4 135 210 6435 6030 U2\001
-4 2 0 50 -1 22 12 0.0000 4 180 645 5580 7020 GPIO.bq\001
4 0 0 50 -1 22 12 0.0000 4 135 210 6030 5355 R5\001
4 0 0 50 -1 22 12 0.0000 4 135 270 6030 5535 50k\001
4 0 0 50 -1 22 12 0.0000 4 135 360 5310 5400 1.5M\001
@@ -124,4 +116,5 @@ Single
4 0 0 50 -1 22 12 0.0000 4 135 210 4320 4230 D1\001
4 2 0 50 -1 22 12 0.0000 4 135 1020 4500 4725 VEMD10940F\001
4 2 0 50 -1 22 12 0.0000 4 135 1005 4095 5445 Audio codec\001
-4 1 0 50 -1 22 12 0.0000 4 135 120 5265 6255 B\001
+4 1 0 50 -1 22 12 0.0000 4 180 645 8910 6255 GPIO.bq\001
+4 1 0 50 -1 22 12 0.0000 4 135 120 4950 6255 B\001