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authorWerner Almesberger <werner@almesberger.net>2016-12-07 11:19:57 -0300
committerWerner Almesberger <werner@almesberger.net>2016-12-07 11:25:21 -0300
commiteb775e3a278c8a9a4fa77dadc4898e1f43787ae2 (patch)
tree5e6c5df931eb85f717339e3f7b4658f5d1e2ddc3 /ir
parente94704b3434cfaa3a033f9d9f2ef4352a8dadf4d (diff)
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ir/: indicate that we don't use GPIOs (other than bq.GPIO) for configuration
Diffstat (limited to 'ir')
-rw-r--r--ir/cir.fig5
-rw-r--r--ir/ir.tex17
-rw-r--r--ir/irda.fig5
-rw-r--r--ir/logic.fig6
-rw-r--r--ir/sys.fig5
-rw-r--r--ir/txcirc.fig6
-rw-r--r--ir/uart.fig5
7 files changed, 19 insertions, 30 deletions
diff --git a/ir/cir.fig b/ir/cir.fig
index d6ee480..5554484 100644
--- a/ir/cir.fig
+++ b/ir/cir.fig
@@ -1,8 +1,8 @@
-#FIG 3.2 Produced by xfig version 3.2.5c
+#FIG 3.2 Produced by xfig version 3.2.6
Portrait
Center
Metric
-A3
+A3
100.00
Single
-2
@@ -81,4 +81,3 @@ Single
4 1 0 50 -1 22 12 0.0000 4 135 1005 2925 5130 Audio codec\001
4 1 0 50 -1 22 12 0.0000 4 180 645 2700 1080 bq.GPIO\001
4 1 0 50 -1 22 12 0.0000 4 180 645 1800 4860 bq.GPIO\001
-4 2 0 50 -1 22 12 0.0000 4 180 450 1080 1395 gpios\001
diff --git a/ir/ir.tex b/ir/ir.tex
index bc4b91d..0af37bc 100644
--- a/ir/ir.tex
+++ b/ir/ir.tex
@@ -317,7 +317,7 @@ or receiver should behave as described in section \ref{off}.
\subsection{Reset}
\label{reset}
-When the control signals from the CPU are in their reset state, the
+After a reset, the
configuration of the IR system is determined by the state of the
GPIO pin of the bq27200 battery fuel gauge.
We call this pin ``bq.GPIO'' in the rest of the document.
@@ -675,14 +675,8 @@ on whether we operate in IR-UART or IrDA mode (section \ref{modesum}).
Finally, if the configuration inputs are in their reset state, the mode is
determined by bq.GPIO (section \ref{reset}).
-With the assumption that inputs default to ``0'' after reset,%
-\footnote{Many CPU pins default to ``0'' but some default to ``1''.
- If using a GPIO that defaults to ``1'', the respective signal
- has to be inverted by the configuration logic.
- However, we will probably use signals from a GPIO expander
- \cite{Neo900-iox}, which may default to high impedance after reset.
- In this case, a suitable pull resistor is needed.}
-we can accomplish all this with the following circuit:
+With the assumption that the configuration inputs default to ``0'' after
+reset, we can accomplish all this with the following circuit:
\begin{center}
\includegraphics[scale=0.9,]{logic.pdf}
@@ -713,9 +707,8 @@ with discrete logic, we use a
Silego SLG46533 mixed-signal array \cite{SLG46533}. This is the
same chip also used for power selection in the Neo900 SIM switch
\cite{Neo900-SIMSW}.%
-\footnote{Since this chip can also communicate over \iic, we may be able
- to use that instead of dedicated configuration signals. This option is
- still under evaluation.}
+\footnote{Since this chip can also communicate over \iic, we will
+ to use that instead of dedicated external configuration signals.}
% - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
diff --git a/ir/irda.fig b/ir/irda.fig
index 4114538..c68cc90 100644
--- a/ir/irda.fig
+++ b/ir/irda.fig
@@ -1,8 +1,8 @@
-#FIG 3.2 Produced by xfig version 3.2.5c
+#FIG 3.2 Produced by xfig version 3.2.6
Portrait
Center
Metric
-A3
+A3
100.00
Single
-2
@@ -77,7 +77,6 @@ Single
4 2 0 50 -1 22 12 0.0000 4 165 990 1080 2925 uart3_rts_sd\001
4 2 0 50 -1 22 12 0.0000 4 165 1125 1080 2610 uart3_cts_rctx\001
4 2 0 50 -1 22 12 0.0000 4 165 990 1080 2295 uart3_tx_irtx\001
-4 2 0 50 -1 22 12 0.0000 4 180 450 1080 1395 gpios\001
4 1 0 50 -1 22 12 0.0000 4 135 570 1575 1260 control\001
4 1 0 50 -1 22 12 0.0000 4 135 1005 2925 5130 Audio codec\001
4 1 0 50 -1 22 12 0.0000 4 180 645 2700 1080 bq.GPIO\001
diff --git a/ir/logic.fig b/ir/logic.fig
index fa933e1..a77ee07 100644
--- a/ir/logic.fig
+++ b/ir/logic.fig
@@ -1,8 +1,8 @@
-#FIG 3.2 Produced by xfig version 3.2.5c
+#FIG 3.2 Produced by xfig version 3.2.6
Landscape
Center
Metric
-A4
+A4
100.00
Single
-2
@@ -88,5 +88,5 @@ Single
4 1 0 50 -1 18 12 0.0000 4 195 795 7290 1755 IR_TX_B\001
4 0 0 50 -1 18 12 0.0000 4 195 1050 10080 3105 IR_TX_LED\001
4 1 0 50 -1 18 12 0.0000 4 195 990 8910 1755 IR_TX_INV\001
-4 1 0 50 -1 18 12 0.0000 4 150 600 7650 1395 GPIOs\001
+4 1 0 50 -1 18 12 0.0000 4 195 1275 7650 1395 Configuration\001
4 2 0 50 -1 22 12 0.0000 4 180 645 4275 2520 bq.GPIO\001
diff --git a/ir/sys.fig b/ir/sys.fig
index 35619e3..f158e2b 100644
--- a/ir/sys.fig
+++ b/ir/sys.fig
@@ -1,8 +1,8 @@
-#FIG 3.2 Produced by xfig version 3.2.5c
+#FIG 3.2 Produced by xfig version 3.2.6
Portrait
Center
Metric
-A3
+A3
100.00
Single
-2
@@ -78,6 +78,5 @@ Single
4 2 0 50 -1 22 12 0.0000 4 165 990 1080 2925 uart3_rts_sd\001
4 2 0 50 -1 22 12 0.0000 4 165 1125 1080 2610 uart3_cts_rctx\001
4 2 0 50 -1 22 12 0.0000 4 165 990 1080 2295 uart3_tx_irtx\001
-4 2 0 50 -1 22 12 0.0000 4 180 450 1080 1395 gpios\001
4 1 0 50 -1 22 12 0.0000 4 135 570 1575 1260 control\001
4 1 0 50 -1 22 12 0.0000 4 135 1005 2925 5130 Audio codec\001
diff --git a/ir/txcirc.fig b/ir/txcirc.fig
index f5bc0b1..4727fed 100644
--- a/ir/txcirc.fig
+++ b/ir/txcirc.fig
@@ -1,8 +1,8 @@
-#FIG 3.2 Produced by xfig version 3.2.5c
+#FIG 3.2 Produced by xfig version 3.2.6
Landscape
Center
Metric
-A4
+A4
100.00
Single
-2
@@ -44,7 +44,7 @@ Single
4 1 0 50 -1 22 12 0.0000 4 135 330 6840 5760 LED\001
4 1 0 50 -1 22 12 0.0000 4 180 390 5265 5535 logic\001
4 1 0 50 -1 22 12 0.0000 4 180 645 5400 4230 bq.GPIO\001
-4 2 0 50 -1 22 12 0.0000 4 180 810 4455 4770 Control[3]\001
+4 2 0 50 -1 22 12 0.0000 4 135 600 4455 4770 Control\001
4 2 0 50 -1 22 12 0.0000 4 135 330 4455 6345 CTS\001
4 2 0 50 -1 22 12 0.0000 4 135 210 4455 6120 TX\001
4 1 0 60 -1 22 12 0.0000 4 135 465 6210 5130 Driver\001
diff --git a/ir/uart.fig b/ir/uart.fig
index 3e3bafe..93a6726 100644
--- a/ir/uart.fig
+++ b/ir/uart.fig
@@ -1,8 +1,8 @@
-#FIG 3.2 Produced by xfig version 3.2.5c
+#FIG 3.2 Produced by xfig version 3.2.6
Portrait
Center
Metric
-A3
+A3
100.00
Single
-2
@@ -81,4 +81,3 @@ Single
4 1 0 50 -1 22 12 0.0000 4 135 1005 2925 5130 Audio codec\001
4 1 0 50 -1 22 12 0.0000 4 180 645 2700 855 bq.GPIO\001
4 1 0 50 -1 22 12 0.0000 4 180 645 1800 4860 bq.GPIO\001
-4 2 0 50 -1 22 12 0.0000 4 180 450 1080 1395 gpios\001