This option allows the locking of NVM code in the programmed chip, preventing a subsequent read of the chip NVM sequence.
An 8-bit code programmed onto the chip that can be used to identify the NVM code programmed onto the chip.
• VDD directly to analog blocks (use for VDD < 1.9V): Bypass regulator for VDD < 1.9V, supply power directly from VDD.
• Regulator and Charge Pump automatically ON/OFF (use for dynamic 1.71V < VDD < 5.5V): Charge pump and Regulator uses auto power detector function. Auto power detector function auto turns on charge pump when VDD is detected <2.7V. When VDD is >2.7V, the charge pump will be off.
• Regulator auto ON/OFF and Charge Pump always OFF (use for dynamic 3.0V < VDD < 5.5V): Charge pump auto power detector function is off therefore Charge pump is always off. When VDD < 3.0V, Analog components may not work as expected.
• Regulator auto ON/OFF and Charge Pump always ON (use for dynamic 1.71 < VDD < 3.0V): Charge pump is always on.
• None: Some devices are all-digital devices; there are no analog components. Therefore, this parameter does not apply.
During the POR sequence, a 2kΩ resistor is connected in parallel to any configured pull-up/down resistors. The 10K, 100K and 1M GPIO Pull-Up/Pull-Down resistors are not enabled until POR so the quick-charge option can help inputs get to the right voltage faster, especially if there is significant capacitance.