The Input/Output Pins (I/O PINS) are for receiving external signals and sending signals out. These general purpose I/Os (GPIOs), can be configured as Analog and Digital inputs and outputs with the exception of PIN2 which can only serve as a digital input or external reset. There are no 3-state or both Digital Input/Output pins in the SLG46722.
Different mode selections per pin can have different restrictions on input/output types.
• Pin not used: will default the PIN with a Pull down 1MOhm resistor;
• Digital input;
• Analog input/output;
• Digital output;
Only available for Input or Input/Output Pins.
• Digital in without Schmitt trigger;
• Digital in with Schmiitt trigger: configures the PIN to have hysteresis which rejects fast and spurious signal transitions;
• Low voltage digital input: the voltage threshold which determines HIGH from LOW is lower than in regular Digital input mode. Use Low voltage digital Input if a desired function is to sense low voltage logic levels (for example 1.8V input signals if the chip VDD is 3.3V or 5V);
Only available for Output or Input/Output Pins. If the PIN is configured as an Output (Push pull with 1x or 2x option, Open drain NMOS 1x or 2x or Open drain PMOS), the software will automatically connect OE to VDD.
• 1x push pull;
• 2x push pull;
• 1x open drain NMOS;
• 2x open drain NMOS;
• 1x open drain PMOS;
• 2x open drain PMOS;
Available for both Input and Output. All ports are in Hi-Z state until chip is powered up. In case of PIN 2, the resistors are fixed to a pull-down configuration only. In case of all other I/O PINs, the internal resistors can be configured as either pull-ups or pull- downs.
• Pull down resistor: Default low;
• Pull up resistor: Default high;
• Floating: no resistor;
If a Pull up or Pull down resistor was chosen for the Resistor parameter, there are three selectable resistor values.
• 10k strongest pull up/down;
• 100k medium pull up/down;
• 1M weakest pull up/down;