The Analog Comparator (ACMP) compares two voltages and outputs a digital signal indicating which is larger. It has two analog input terminals, IN+ and IN-. If IN+ is greater than IN-, the digital output OUT is high.

Activation

The ACMP power up signal (PWR UP) is active high. Set the PWR UP to a non-gnd signal.

Use the WS Ctrl counter to duty cycle wake sleep the ACMP through PWR UP. See ‘Wake and Sleep’ section below.

Wake and Sleep

The Wake and Sleep function applies for all ACMPs. This function latches ACMP outputs. Saves power when used in conjunction with PWR UP. The Wake Sleep Controll (WS Ctrl) can be configured for this purpose.

To use ACMP with WS Ctrl:

1. Activate ACMP and connect PWR UP to a power up signal or CNT0/DLY0.
2. Activate CNT0/DLY0. This must be set to Wake and Sleep Controller mode.
3. Enable Wake Sleep in WS settings for each ACMP seperately

Parameters

Table 1.

Hysteresis:

Hysteresis is applied post gain stage. The Four selectable hysteresis options 0mV, 25mV, 50mV and 200mV where hysteresis 50mV and 200mV do not apply to external voltage references IN-. See Table in Properties for VIH and VIL estimates.

• 0mV: disable hysteresis.

• 25mV: is +12.5mV and -12.5mV

• 50mV: is +0mV and -50mV

• 200mV: is +0mV and -200mV

Low bandwidth:

Enable a low pass filter on positive input. Cutoff frequency << 5kHz.

IN+ gain:

A selectable resistor divider stage of 1X, 0,5X, 0.33X and 0.25X. This stage is applied after the buffer and before hysteresis. The Resistor Divider power on is controlled by ACMP PWR UP signal.

IN+ source:

Positive Analog input source to ACMP. (View Table 1.)

IN- source:

Negative Analog input source to ACMP. Internal Vref thresholds are optimized near 1000mV. (View Table 1.)

Information

Typical ACMP Thresholds

V_IH is the typical IN+ voltage at which a Low to High transition occurs at the output.

V_IL is the typical IN+ voltage at which a High to Low transition occurs at the output.